Skip to content
D DocNectar

Free Linear Feedback Shift Register (LFSR) Calculator

Simulate a Linear Feedback Shift Register step by step from a seed bit string and tap positions.

100% Free No Signup Works on all devices

Built and fact-checked by the DocNectar team — see our editorial standards

Thanks for rating!

Key Features

Instant Calculation

Get accurate results in real time with our optimized algorithm.

Mobile Friendly

Fully responsive design. Works on all devices & screen sizes.

Privacy Focused

Your data stays on your device. We don't store any inputs.

100% Free

No hidden costs. This tool is completely free forever.

A Linear Feedback Shift Register (LFSR) is a shift register — a row of bits that shifts one position at a time — whose new incoming bit is computed as a linear function (specifically, an XOR) of some of its own previous bits, rather than from any outside input. Despite being fully deterministic, an LFSR's output sequence looks statistically "random" over a long run and repeats only after a long period, which is why LFSRs are a workhorse building block in digital electronics and cryptography: generating pseudo-random bit sequences for testing, computing CRC (cyclic redundancy check) error-detection codes used in networking and storage, and forming the core of classic stream ciphers used in encryption.

How it works

Enter the seed as a bit string (the register's starting contents, read left to right), the tap positions (1-indexed counting from the left end of the register, comma-separated), and the number of steps to simulate. This tool models the "Fibonacci" LFSR configuration, the more common of the two standard LFSR layouts. At each step: the feedback bit is computed by XOR-ing together the bits currently sitting at every specified tap position; the bit at the rightmost end of the register is read off as that step's output bit; the entire register then shifts one position to the right, discarding that rightmost bit; and the newly-computed feedback bit is inserted at the now-empty leftmost position. Repeating this process for the requested number of steps produces the full output sequence, one bit per step.

  1. Enter seed (bit string).
  2. Enter tap positions, 1-indexed from the left (comma-separated).
  3. Enter number of steps to simulate.
  4. Click Calculate to see your results.

Examples

Seed = 1011, taps = 4,3, steps = 4

Register starts as [1,0,1,1]. Step 1: feedback = bit4 XOR bit3 = 1 XOR 1 = 0; output bit = bit4 = 1; register becomes [0,1,0,1]. Step 2: feedback = 1 XOR 0 = 1; output = 1; register becomes [1,0,1,0]. Step 3: feedback = 0 XOR 1 = 1; output = 0; register becomes [1,1,0,1]. Step 4: feedback = 1 XOR 0 = 1; output = 1; register becomes [1,1,1,0]. Final output sequence: 1101. Final register: 1110.

Seed = 101, taps = 3,1, steps = 3

Register starts as [1,0,1]. Step 1: feedback = bit3 XOR bit1 = 1 XOR 1 = 0; output = bit3 = 1; register becomes [0,1,0]. Step 2: feedback = 0 XOR 0 = 0; output = 0; register becomes [0,0,1]. Step 3: feedback = 1 XOR 0 = 1; output = 1; register becomes [1,0,0]. Final output sequence: 101. Final register: 100.

Who should use it

  • Understanding how CRC checksums and pseudo-random bit generators work internally.
  • Digital electronics and cryptography coursework on shift registers.
  • Prototyping simple stream-cipher-style keystream generation for learning purposes.

Industry applications

  • Digital electronics and hardware design
  • Networking and data storage (CRC error detection)
  • Cryptography education

Advantages

  • Simple, fast, and fully deterministic — reproducible given the same seed and taps.
  • A foundational building block for CRCs, pseudo-random generators, and classic stream ciphers.

Limitations

  • Not cryptographically secure on its own, since the linear feedback rule is predictable given enough output bits.
  • An all-zero seed produces a permanently stuck output.

Common mistakes to avoid

  • Using a tap position greater than the seed's bit length, which doesn't correspond to any actual register position.
  • Starting from an all-zero seed, which produces a permanently "stuck" register that only ever outputs zeros.
  • Assuming the output is cryptographically secure on its own — a plain single LFSR's output can be predicted by an attacker who recovers enough consecutive output bits, since the feedback rule is linear and therefore solvable.

Best practices

  • Avoid an all-zero seed, since it produces a permanently stuck, all-zero output.
  • Double check tap positions are numbered from the left and don't exceed the register's bit length.
  • Remember an LFSR alone is deterministic and not cryptographically secure — real stream ciphers add extra nonlinear complexity on top.

Tips

  • Curious about modern, cryptographically-secure encryption instead? Look at the AES Encryption Tool.

Frequently asked questions

No — an LFSR is fully deterministic. The same seed and tap positions always produce exactly the same output sequence every single time, which is why it's called "pseudo-random" rather than truly random.
This tool simulates the Fibonacci configuration, where multiple tapped bits are all XOR-ed together into one feedback value fed into a single input position. The alternative "Galois" configuration instead XORs the feedback into several positions simultaneously as the register shifts — both configurations can be designed to produce the exact same output sequence, just computed with a different internal wiring.
The tap positions and register length together determine the sequence's period. A well-chosen set of taps (corresponding to a "primitive polynomial" in the underlying algebra) produces a "maximal-length" LFSR, whose output doesn't repeat until every possible nonzero register state has been visited exactly once.
An all-zero register is a "stuck" state for a Fibonacci LFSR — since XOR-ing any number of zero bits together always produces zero feedback, the register stays at all-zeros forever once it gets there, producing an endless run of zero output. This is why the all-zero seed is normally avoided.
Their pseudo-random-looking output can be combined (via XOR) with a plaintext message to produce ciphertext that looks statistically random to an outside observer, while remaining easy to reverse for anyone who knows the same seed and tap configuration — though modern cryptography typically combines multiple LFSRs or adds extra nonlinear steps, since a single plain LFSR is fairly easy to break.
This tool numbers tap positions starting at 1 from the LEFT end of the register — so for a 4-bit register, position 1 is the leftmost bit and position 4 is the rightmost bit (the one read off as output each step).

Get new calculators and guides in your inbox

No spam — just new tools like LFSR Calculator and practical guides.

Favorites